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vishay siliconix si1426dh document number: 71805 s10-0935-rev. b, 19-apr-10 www.vishay.com 1 n-channel 30 v (d-s) mosfet features ? halogen-free according to iec 61249-2-21 definition ? trenchfet ? power mosfet ? thermally enhanced sc-70 package ? pwm optimized ? compliant to rohs directive 2002/95/ec applications ? boost converter in portable devices - low gate charge (3 nc) ? low current synchronous rectifier product summary v ds (v) r ds(on) ( )i d (a) 30 0.075 at v gs = 10 v 3.6 0.115 at v gs = 4.5 v 2.9 note: a. surface mounted on 1" x 1" fr4 board. absolute maximum ratings t a = 25 c, unless otherwise noted parameter symbol 5 s steady state unit drain-source voltage v ds 30 v gate-source voltage v gs 20 continuous drain current (t j = 150 c) a t a = 25 c i d 3.6 2.8 a t a = 85 c 2.6 2.1 pulsed drain current i dm 10 continuous diode current (diode conduction) a i s 1.3 0.8 maximum power dissipation a t a = 25 c p d 1.6 1.0 w t a = 85 c 0.8 0.5 operating junction and storage temperature range t j , t stg - 55 to 150 c thermal resistance ratings parameter symbol typical maximum unit maximum junction-to-ambient a t 5 s r thja 60 80 c/w steady state 100 125 maximum junction-to-foot (drain) steady state r thjf 34 45 marking code ac xx lot traceability and date code part # code yy sot-363 sc-70 (6-leads) 6 4 1 2 3 5 top view d d g d d s ordering information: SI1426DH-T1-e3 (lead (pb)-free) SI1426DH-T1-ge3 (lead (pb)-free and halogen-free)
www.vishay.com 2 document number: 71805 s10-0935-rev. b, 19-apr-10 vishay siliconix si1426dh notes: a. pulse test; pulse width 300 s, duty cycle 2 %. b. guaranteed by design, not s ubject to production testing. stresses beyond those listed under ?absolute maximum ratings? ma y cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other condit ions beyond those indicated in the operational sections of the specifications is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. typical characteristics 25 c, unless otherwise noted specifications t a = 25 c, unless otherwise noted parameter symbol test conditions min. typ. max. unit static gate threshold voltage v gs(th) v ds = v gs , i d = 250 a 0.80 2.5 v gate-body leakage i gss v ds = 0 v, v gs = 20 v 100 na zero gate voltage drain current i dss v ds = 24 v, v gs = 0 v 1 a v ds = 24 v, v gs = 0 v, t j = 85 c 5 on-state drain current a i d(on) v ds = 5 v, v gs = 10 v 10 a drain-source on-state resistance a r ds(on) v gs = 10 v, i d = 3.6 a 0.061 0.075 v gs = 4.5 v, i d = 2.0 a 0.092 0.115 forward transconductance a g fs v ds = 10 v, i d = 3.6 a 5s diode forward voltage a v sd i s = 1.3 a, v gs = 0 v 0.78 1.2 v dynamic b total gate charge q g v ds = 15 v, v gs = 4.5 v, i d = 3.6 a 1.9 3 nc gate-source charge q gs 0.75 gate-drain charge q gd 0.75 tu r n - o n d e l ay t i m e t d(on) v dd = 15 v, r l = 15 i d ? 1 a, v gen = 10 v, r g = 6 10 15 ns rise time t r 12 18 turn-off delay time t d(off) 15 22 fall time t f 915 source-drain reverse recovery t rr i f = 1.4 a, di/dt = 100 a/s 40 70 output characteristics 0 2 4 6 8 10 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 v ds - drain-to-source voltage (v) i d - drain current (a) v gs = 10 v thru 5 v 4 v 3 v transfer characteristics 0 2 4 6 8 10 012345 v gs - gate-to-source voltage (v) i d - drain current (a) 25 c - 55 c t c = 125 c
document number: 71805 s10-0935-rev. b, 19-apr-10 www.vishay.com 3 vishay siliconix si1426dh typical characteristics 25 c, unless otherwise noted on-resistance vs. drain current gate charge source-drain diode forward voltage 0.00 0.04 0.08 0.12 0.16 0246810 v gs = 10 v v gs = 4.5 v r ds(on) - on-resistance ( ) i d - drain current (a) 0 2 4 6 8 10 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 v gs - gate-to-so u rce v oltage ( v ) q g - total gate charge (nc) v ds = 15 v i d = 3.6 a 0.0 0.2 0.4 0.6 0.8 1.0 1.2 t j = 150 c t j = 25 c 10 0.1 v sd - source-to-drain voltage (v) - source current (a) i s 1 capacitance on-resistance vs. junction temperature on-resistance vs. gate-to-source voltage 0 50 100 150 200 250 0 6 12 18 24 30 s v ds - drain-to-source voltage (v) c - capacitance (pf) c rss c oss c iss 0.6 0.8 1.0 1.2 1.4 1.6 1.8 - 50 - 25 0 25 50 75 100 125 150 v gs = 10 v i d = 3.6 a t j - junction temperature (c) (normalized) - on-resistance r ds(on) 0.00 0.04 0.08 0.12 0.16 0.20 0246810 i d = 3.6 a - on-resistance ( ) r ds(on) v gs - gate-to-source voltage (v) i d = 1 a
www.vishay.com 4 document number: 71805 s10-0935-rev. b, 19-apr-10 vishay siliconix si1426dh typical characteristics 25 c, unless otherwise noted vishay siliconix maintains worldwide manufacturing capability. products may be manufactured at one of several qualified locatio ns. reliability data for silicon technology and package reliability represent a composite of all qualified locations. for related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?71805 . threshold voltage - 0.8 - 0.6 - 0.4 - 0.2 0.0 0.2 0.4 - 50 - 25 0 25 50 75 100 125 150 i d = 250 a variance (v) v gs(th) t j - temperature (c) single pulse power 0 20 30 5 15 power (w) time (s) 25 1 600 100 0.001 0.1 10 0.01 10 normalized thermal transient impedance, junction-to-ambient 10 -3 10 -2 1 10 600 10 -1 10 -4 100 2 1 0.1 0.01 0.2 0.1 0.05 0.02 single pulse duty cycle = 0.5 square wave pulse duration (s) normalized effective transient thermal impedance 1. duty cycle, d = 2. per unit base = r thja = 100 c/w 3. t jm - t a = p dm z thja (t) t 1 t 2 t 1 t 2 notes: 4. surface mounted p dm normalized thermal transient impedance, junction-to-foot 10 -3 10 -2 110 10 -1 10 -4 2 1 0.1 0.01 0.2 0.1 0.05 0.02 single pulse duty cycle = 0.5 square wave pulse duration (s) normalized effective transient thermal impedance
l c e e 1 e d e 1 a 2 a a 1 1 -a- b -b- 23 654 package information vishay siliconix document number: 71154 06-jul-01 www.vishay.com 1

dim min nom max min nom max a 0.90 ? 1.10 0.035 ? 0.043 a 1 ? ? 0.10 ? ? 0.004 a 2 0.80 ? 1.00 0.031 ? 0.039 b 0.15 ? 0.30 0.006 ? 0.012 c 0.10 ? 0.25 0.004 ? 0.010 d 1.80 2.00 2.20 0.071 0.079 0.087 e 1.80 2.10 2.40 0.071 0.083 0.094 e 1 1.15 1.25 1.35 0.045 0.049 0.053 e 0.65bsc 0.026bsc e 1 1.20 1.30 1.40 0.047 0.051 0.055 l 0.10 0.20 0.30 0.004 0.008 0.012 7 nom 7 nom ecn: s-03946?rev. b, 09-jul-01 dwg: 5550
an815 vishay siliconix document number: 71334 12-dec-03 www.vishay.com 1 single-channel little foot sc-70 6-pin mosfet copper leadframe version recommended pad pattern and thermal performance introduction the new single 6-pin sc-70 package with a copper leadframe enables improved on-resistance values and enhanced thermal performance as compared to the existing 3-pin and 6-pin packages with alloy 42 leadframes. these devices are intended for small to medium load applications where a miniaturized package is required. devices in this package come in a range of on-resistance values, in n-channel and p-channel versions. this technical note discusses pin-outs, package outlines, pad patterns, evaluation board layout, and thermal performance for the single-channel version. basic pad patterns see application note 826, recommended minimum pad patterns with outline drawing access for vishay siliconix mosfet s, ( http://www.vishay.com/doc?72286 ) for the basic pad layout and dimensions. these pad patterns are sufficient for the low to medium power applications for which this package is intended. increasing the drain pad pattern yields a reduction in thermal resistance and is a preferred footprint. the availability of four drain leads rather than the traditional single drain lead allows a better thermal path from the package to the pcb and external environment. pin-out figure 1 shows the pin-out description and pin 1 identification.the pin-out of this device allows the use of four pins as drain leads, which helps to reduce on-resistance and junction-to-ambient thermal resistance. figure 1. sot-363 sc-70 (6-leads) 6 4 1 2 3 5 top view d d g d d s for package dimensions see outline drawing sc-70 (6-leads) ( http://www.vishay.com/doc?71154 ) evaluation boards single sc70-6 the evaluation board (evb) measures 0.6 inches by 0.5 inches. the c opper pad traces are the same as in figure 2. the board allows examination from the outer pins to 6-pin dip connections, permitting test sockets to be used in evaluation testing. see figure 3. figure 2. sc-70 (6 leads) single 52 (mil) 96 (mil) 13 (mil) 71 (mil) 0, 0 (mil) 18 (mil) 16 (mil) 26 (mil) 26 (mil) 654 3 2 1 the thermal performance of the single 6-pin sc-70 has been measured on the evb, comparing both the copper and alloy 42 leadframes. this test was first conducted on the traditional alloy 42 leadframe and was then repeated using the 1-inch 2 pcb with dual-side copper coating.
an815 vishay siliconix www.vishay.com 2 document number: 71334 12-dec-03 figure 3. front of board sc70-6 back of board sc70-6 vishay.com thermal performance junction-to-foot thermal resistance (package performance) the junction to foot thermal resistance is a useful method of comparing different packages thermal performance. a helpful way of presenting the thermal performance of the 6-pin sc-70 copper leadframe device is to compare it to the traditional alloy 42 version. thermal performance for the 6-pin sc-70 measured as junction-to-foot thermal resistance, where the ?foot? is the drain lead of the device at the bottom where it meets the pcb. the junction-to-foot thermal resistance is typically 40 c/w in the copper leadframe and 163 c/w in the alloy 42 leadframe ? a four-fold improvement. this improved performance is obtained by the enhanced thermal conductivity of copper over alloy 42. power dissipation the typical r ja for the single 6-pin sc-70 with copper leadframe is 103 c/w steady-state, compared with 212 c/w for the alloy 42 version. the figures are based on the 1-inch 2 fr4 test board. the following example shows how the thermal resistance impacts power dissipation for the two different leadframes at varying ambient temperatures. alloy 42 leadframe room ambient 25 c elevated ambient 60 c p d t j(max) t a r ja p d 150 o c 25 o c 212 o c w p d 590 mw p d t j(max) t a r ja p d 150 o c 25 o c 212 o c w p d 425 mw cooper leadframe room ambient 25 c elevated ambient 60 c p d t j(max) t a r ja p d 150 o c 25 o c 124 o c w p d 1.01 w p d t j(max) t a r ja p d 150 o c 60 o c 124 o c w p d 726 mw as can be seen from the calculations above, the compact 6-pin sc-70 copper leadframe little foot power mosfet can handle up to 1 w under the stated conditions. testing to further aid comparison of copper and alloy 42 leadframes, figure 5 illustrates single-channel 6-pin sc-70 thermal performance on two dif ferent board sizes and two different pad patterns. the measured steady-state values of r ja for the two leadframes are as follows: little foot 6-pin sc-70 alloy 42 copper 1) minimum recommended pad pattern on the evb board v (see figure 3. 329.7 c/w 208.5 c/w 2) industry standard 1-inch 2 pcb with maximum copper both sides. 211.8 c/w 103.5 c/w the results indicate that designers can reduce thermal resistance (r ja ) by 36% simply by using the copper leadframe device rather than the alloy 42 version. in this example, a 121 c/w reduction was achieved without an increase in board area. if increasing in board size is feasible, a further 105 c/w reduction could be obtained by utilizing a 1-inch 2 square pcb area. the copper leadframe versions have the following suffix: single: si14xxedh dual: si19xxedh complementary: si15xxedh
an815 vishay siliconix document number: 71334 12-dec-03 www.vishay.com 3 time (secs) figure 4. leadframe comparison on evb thermal resistance (c/w) 0 1 400 80 160 100 1000 240 10 10 -1 10 -2 10 -3 10 -4 10 -5 alloy 42 320 time (secs) figure 5. leadframe comparison on alloy 42 1-inch 2 pcb thermal resistance (c/w) 0 1 250 50 100 100 1000 150 10 10 -1 10 -2 10 -3 10 -4 10 -5 200 copper copper alloy 42
application note 826 vishay siliconix www.vishay.com document number: 72602 18 revision: 21-jan-08 application note recommended minimum pads for sc-70: 6-lead 0.096 (2.438) recommended mi nimum pads dimensions in inches/(mm) 0.067 (1.702) 0.026 (0.648) 0.045 (1.143) 0.016 (0.406) 0.026 (0.648) 0.010 (0.241) return to index return to index
legal disclaimer notice www.vishay.com vishay revision: 02-oct-12 1 document number: 91000 disclaimer all product, product specifications and data are subject to change without notice to improve reliability, function or design or otherwise. vishay intertechnology, inc., its affiliates, agents, and employee s, and all persons acting on it s or their behalf (collectivel y, vishay), disclaim any and all liability for any errors, inaccuracies or incompleteness contained in any datasheet or in any o ther disclosure relating to any product. vishay makes no warranty, repres entation or guarantee regarding the suitabilit y of the products for any particular purpose or the continuing production of any product. to the maximum extent permitted by applicable law, vi shay disclaims (i) any and all liability arising out of the application or use of any product, (ii) any and all liability, including without limitation specia l, consequential or incidental damages, and (iii) any and all i mplied warranties, including warra nties of fitness for particular purpose, non-infringement and merchantability. statements regarding the suitability of products for certain type s of applications are based on vishays knowledge of typical requirements that are often placed on vishay products in generic applications. such statements are not binding statements about the suitability of products for a particular application. it is the customers responsib ility to validate that a particu lar product with the properties descri bed in the product specification is suitable fo r use in a particular application. parameters provided in datasheets and/or specification s may vary in different applications an d performance may vary over time. all operating parameters, including typical pa rameters, must be validated for each customer application by the customers technical experts. product specifications do not expand or otherwise modify vish ays terms and condit ions of purchase, including but not limited to the warranty expressed therein. except as expressly indicate d in writing, vishay products are not designed for use in medical, life-saving, or life-sustaining applications or for any other application in which the failure of the vi shay product could result in personal injury or death. customers using or selling vishay products not expressly indicated for use in such applications do so at their own risk. pleas e contact authorized vishay personnel to ob tain written terms and conditions regarding products designed for such applications. no license, express or implied, by estoppel or otherwise, to any intellectual prope rty rights is granted by this document or by any conduct of vishay. product names and markings noted herein may be trad emarks of their respective owners. material category policy vishay intertechnology, inc. hereby certi fies that all its products that are id entified as rohs-compliant fulfill the definitions and restrictions defined under directive 2011/65/eu of the euro pean parliament and of the council of june 8, 2011 on the restriction of the use of certain hazardous substances in electrical and electronic equipment (eee) - recast, unless otherwis e specified as non-compliant. please note that some vishay documentation may still make reference to rohs directive 2002/95/ ec. we confirm that all the products identified as being compliant to directive 2002 /95/ec conform to directive 2011/65/eu. vishay intertechnology, inc. hereby certifi es that all its products that are identified as ha logen-free follow halogen-free requirements as per jedec js709a stan dards. please note that some vishay documentation may still make reference to the iec 61249-2-21 definition. we co nfirm that all the products identified as being compliant to iec 61249-2-21 conform to jedec js709a standards.

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